14. Coprocessor 0
The EntryHi register is accessed by the TLB Probe, TLB Write Random, TLB Write Indexed, and TLB Read Indexed instructions.
Figure 14-10 shows the format of this register and Table 14-8 describes the register's fields..
Figure 14-10 EntryHi Register
Table 14-8 EntryHi Register Fields 
In 64-bit addressing mode, the VPN2 field contains bits 43:13 of the 44-bit virtual address.
In 32-bit addressing mode only the lower 32 bits of the EntryHi register are used, so the format remains the same as in the R4400 processor's 32-bit addressing mode. The FILL field is ignored on write and read as zeroes, as it was in the R4400 implementation.
When either a TLB refill, TLB invalid, or TLB modified exception occurs, the EntryHi register is loaded with the virtual page number (VPN2) and the ASID of the virtual address that did not have a matching TLB entry.
